The present invention relates generally to the field of communication systems and more specifically to a method and circuit for de-skewing data in communication systems.
A data-bus typically comprises a number of parallel interface lines for communicating data signals in parallel. However, the data signals in all of the parallel lines are not always received by a receiver at the same time, even though the data signals are simultaneously transmitted in synchronization with the transmitter system clock. This results in a condition known as data skew. Data skew refers to the delay and/or early arrival of a data bit relative to other data bits in the parallel lines. Conventional systems for de-skewing data on computer data-buses are generally well known. While systems for de-skewing data have been applied to other contexts, such systems are inapplicable to certain communication networks such as SONET (synchronous optical network). In part, this is due to certain unique attributes possessed by SONETs. Another reason relates to certain interface standards that SONETs must meet.
SONET is a transport mechanism for multiplexing high-speed data from multiple networks onto fiber optic cabling. It interconnects IP (Internet protocol) networks, ATM (asynchronous transfer mode) switches, T1s and the like via fiber optic networks known as SONET rings. For example, an IP network in San Francisco may be interconnected to a New York IP network via a SONET ring. Since different network types are interconnected, routers are employed for converting protocols from one network type to another. In the case of IP protocols, routers are used for converting the IP packets into a form suitable for transmission on the SONET ring.
A board or line card in the router receives the IP packets on one end, performs the necessary conversions and sends out the packets at the other end. Among other components, a line card includes a framer chip for framing/de-framing IP packets, and a system chip for performing protocol conversion and for controlling packet traffic. The framer chip communicates with the system side through an interface known as the SPI-4 (system packet interface). The SPI-4 interface is a standard defined by a consortium of communication companies for packet and cell transfer between a physical layer device (i.e., the framer chip) and a link layer device (i.e., the system chip). As defined, the SPI-4 interface has a 16 bit data bus at a clock speed of 622 MHz. Other features of the SPI-4 interface include a transmit control signal (TCTL) and a receive control signal (RCTL) between the system chip and the framer chip. Further, the SPI-4 interface requires the system chip to periodically send training sequences to the framer chip for detecting data skew. Alternatively, the training sequences are periodically sent from the framer chip to the system chip.
As noted, data skew refers to the delay and/or early arrival of a data bit relative to other data bits in the parallel lines. The skew may be due to a combination of board layout, environment temperature variation and other reasons. To facilitate understanding the present invention, FIG. 1 is a block diagram of a board level connection 100 for the transmit direction between a system chip 100 and a framer chip 101 illustrating data skew on the 16 bit data-bus.
In FIG. 1, the transmit direction has 16 data transmit lines and a transmit control line between system chip 100 and framer chip 101. Each transmit line has a delay buffer 104-1 thorough 104-17, respectively, each representing the total delay caused by board level wires as well as the output delay from system chip 100 and the input delay from framer chip 101. Because the data lines may not be of exactly the same length or same width for all 16 data transmit lines, data bit on each line may each arrive at their destinations 103-1 through 103-17 at different times. Given a clock frequency of 622 MHz (i.e., clock period=1.6 ns) the time differences among the 16 data-bits can be as long as 1 clock cycle or greater thus causing data skew among the data lines. When data skew occurs, all of the data-bits are no longer aligned.
Therefore, there is a need to resolve the aforementioned disadvantage of data communication networks such as SONET and the present invention meets this need.